RISC-V instruction set (ISA) is open source. But the actual implementation (microarchitecture) has no such obligations. And among the implementations that can run Linux, none (that I know) are open source designs.
With regards to hardware backdoors - no, closed source RISC-V implementations are not easier than x86 or ARM to audit for security.
Does RISC-V have security benefits since it is open source? Is it easier to detect hardware backdoors if it is used instead of x86 or ARM?
RISC-V instruction set (ISA) is open source. But the actual implementation (microarchitecture) has no such obligations. And among the implementations that can run Linux, none (that I know) are open source designs.
With regards to hardware backdoors - no, closed source RISC-V implementations are not easier than x86 or ARM to audit for security.
I think the CPU chips themselves are closed source but the architecture is open under MIT so this means anyone can close them